This invention relates generally to chip enable functions used on integrated circuits and, more specifically, to chip enable functions on field programmable devices.
The use of enable inputs on integrated circuit devices is well known. These inputs are used to enable or disable a device or function in accordance with specific design requirements or specifications.
A specific example of the use of a chip enable is seen in circuits which require the outputs of several memory devices to be connected together. Such circuits require that the outputs of the subject memory devices be either open collector outputs or "three state" outputs. If open collector outputs are used, the outputs from different devices can be "wire OR'd" together. However, to attain high switching speeds, an active output pull-up is usually preferred. This necessitates the use of "three state" outputs. To connect these outputs together further requires the use of one or more output enable, chip enable, or gate pins on the respective devices. These inputs usually require external (i.e., off-chip) logic circuitry to supply the appropriate enabling or disabling signal. For example, if the outputs of two devices that each have a single active low enable are to be connected, an inverter is used to provide opposite logic state signals to the enable pins on the respective devices to ensure that they are not enabled at the same time. In more complex arrangements, the external logic circuitry required to drive the enable inputs of a plurality of devices can become proportionately more complicated than the single inverter in the example described above. Implementation of this external circuitry requires additional board space and adds to the complexity of the board wiring. Accordingly, there exists a need to eliminate or reduce the external circuitry required to successfully connect devices such as those described above.
It is an object of the present invention to provide a means by which the external (off-chip) circuitry on application type circuit boards can be eliminated or simplified.
Another object of the present invention is to provide a means by which the layout of application type printed circuit boards can be simplified.
Yet another object of the present invention is to provide an enable function for an integrated logic array which has improved operating speed characteristics.
These and other objects are attained in an integrated circuit device which includes a programmable enable function. More specifically, the present invention comprises a programmable chip enable for an integrated circuit which includes an input on the device for receiving a logic level enable signal, circuitry for producing an enabling signal in response to the logic level signal at the input, and means for programming the circuitry to respond to a selected one of a plurality of logic level signals. A preferred application of this invention is in field programmable memory devices which have one or more memory outputs connected together.
A programmable enable function allows a particular device to be customized at the time of application and effectively replaces the additional circuitry required in applications such as that described above. In the specific example discussed, wherein two devices have single enables driven by an inverted and a non-inverted logic output, a programmable enable function would eliminate the external circuitry (i.e., the inverter) altogether. One device would have its enable programmed to be active low and the other device would have its enable programmed to be active high. Thus, the enables can be connected to a single line with assurance that the two devices will not operate simultaneously.
Other objects and advantages of the prevent invention will be more apparent from the following detailed description of the preferred embodiments depicted in the drawings.